IO34X-63: I/O interface for IO34X I/O modules providing 4x Analog I/O lines

IO34X-63

An I/O interface for IO34X I/O modules providing 4x Analog I/O lines

The IO34X-63 I/O interface provides four high-speed, and high-resolution ADC, and four high-resolution DAC channels.

This extremely broadband analog-acquisition module empowers users to work with the highest speed analog signals in the FPGA domain.

Both the ADC inputs and the DAC outputs operate at 16-bit, 1 GSPS.
Signals are available to the user's HDL Coder design as data, valid and trigger input and output ports.

Key features:

4 analog input channels, operating at 16 bits and 1 GSPS
4 analog output channels, operating at 16 bits and 1 GSPS
Optional input for a 10 or 100 MHz reference clock
Simulink-programmable FPGA workflow to use HDL Coder™ and Simulink Real-Time™ supported by the Speedgoat HDL Coder Integration Pack-age
Simulink Real-Time driver blocks as required for the HDL Coder Integration Package.

Physical
Form factor	ANSI/VITA 47
Bus	HPC FMC

Environmental
Operating temperature	0 °C to +55 °C
Relative humidity	5 to 95 %, non-condensing

Signal Properties
Output range	DC Coupled: +4 dBm/1.0 Vp-p Typical @100 MHz into 50 ohms. 10 ns settling time to 0.1 %.
Input range	DC Coupled: (50 ohms) DC to 400 MHz: +4 dBm/1.0Vp-p DC (Max.) DC to 1000 MHz: -5.0 dBm (Max.)

I/O Interface
I/O channels	4 channels each of analog in and analog out
Inputs	A0-A3 SSMC Connectors
Outputs	D0-D3 SSMC Connectors

HDL Coder Interface
Sample Rate	1 GSPS
Sample Resolution	16-bit
Data Interface	8x16 bit samples per FPGA tick
Control interface	Trigger, valid and ready (AXI4-Stream timing)

Item ID	Product Name	Components
2O342	IO34X-63	1x IO34X-63 Comprehensive documentation and Simulink example models Installation onto the carrier

Pricing information
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