This analog input module samples and digitizes up to 32 input channels simultaneously at rates up to 1 MSPS (million samples per second) per channel. Each channel contains a dedicated successive-approximation (SAR) analog to digital converter (ADC). The sample data is error-corrected and routes to the PCI bus through a 1-MByte FIFO buffer.
Inputs can be sampled in groups of 2, 4, 8, 16, or 32 channels, and the sample clock can be generated from the internal rate generator, or by software or external hardware such as the on-board clock of our FPGA-based I/O modules, which is often required for synchronized PWM.
Input ranges are software-selectable as ±10V or ±5V (fullscale), or as an order option as ±2.5V or ±1.25V (fullscale).
Select this very low latency module if your application requires high resolution and high sample rates to acquire a high number of analog signals simultaneously.
The following variants are available:
I/O module |
Resolution |
Sampling mode |
Voltage/Current Range |
No. of inputs |
No. of outputs |
Other |
IO112-4-18 |
18-bit |
AD: SM |
±10V, ±5V (option ±2.5V/±1.25V) |
4 DF |
- |
DMA |
IO112-8-18 |
18-bit |
AD: SM |
±10V, ±5V (option ±2.5V/±1.25V) |
8 DF |
- |
DMA |
IO112-16-18 |
18-bit |
AD: SM |
±10V, ±5V (option ±2.5V/±1.25V) |
16 DF |
- |
DMA |
IO112-32-18 |
18-bit |
AD: SM |
±10V, ±5V (option ±2.5V/±1.25V) |
32 DF |
- |
DMA |
IO112-4-16 |
16-bit |
AD: SM |
±10V, ±5V (option ±2.5V/±1.25V) |
4 DF |
- |
DMA |
IO112-8-16 |
16-bit |
AD: SM |
±10V, ±5V (option ±2.5V/±1.25V) |
8 DF |
- |
DMA |
IO112-16-16 |
16-bit |
AD: SM |
±10V, ±5V (option ±2.5V/±1.25V) |
16 DF |
- |
DMA |
IO112-32-16 |
16-bit |
AD: SM |
±10V, ±5V (option ±2.5V/±1.25V) |
32 DF |
- |
DMA |